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Drop scripts/edid_gen.py — exploration tool, not a build dependency
The Python EDID generator was only used during this PR's development phase to probe the TC358743 chip's max vrefresh and produce candidate EDIDs. Now that the only EDID change is one DTD added to the JetKVM default (a fully-validated 18-byte hex string in internal/native/video.go and ui/src/routes/devices.\$id.settings.video.tsx), the generator is no longer referenced by any code path. Drop it from the PR to keep the diff focused on the runtime change. Available in git history if anyone wants to extend the EDID set later. Co-Authored-By: Claude Opus 4.7 (1M context) <noreply@anthropic.com>
This commit is contained in:
Josh Selstad
@@ -1,443 +0,0 @@
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#!/usr/bin/env python3
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"""
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EDID generator for JetKVM high-refresh-rate testing.
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Generates EDIDs with custom CVT-RB detailed timings, suitable for advertising
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non-standard 480p/720p high-refresh modes to the source PC.
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Outputs hex strings ready for the JetKVM `setEDID` JSONRPC.
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"""
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import math
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import sys
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# CVT Reduced Blanking v1 constants (VESA CVT 1.0)
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RB_H_BLANK = 160
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RB_H_SYNC = 32
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RB_H_BACK_PORCH = 80
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RB_H_FRONT_PORCH = RB_H_BLANK - RB_H_SYNC - RB_H_BACK_PORCH # 48
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RB_V_FRONT_PORCH = 3
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RB_V_BACK_PORCH = 6
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RB_MIN_V_BLANK_US = 460
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CLOCK_STEP_KHZ = 250
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def _v_sync_for_aspect(h, v):
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ratio = h / v
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# VESA aspect-dependent vsync widths
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if abs(ratio - 4 / 3) < 0.05:
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return 4
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if abs(ratio - 16 / 9) < 0.05:
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return 5
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if abs(ratio - 16 / 10) < 0.05:
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return 6
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if abs(ratio - 5 / 4) < 0.05:
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return 7
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if abs(ratio - 15 / 9) < 0.05:
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return 7
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return 10 # custom
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def cvt_rb(h_active, v_active, refresh):
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"""Compute CVT-RB v1 timings. Returns dict with full timing breakdown."""
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h_active = (h_active // 8) * 8 # round down to multiple of 8
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h_period_est_us = (1_000_000 / refresh - RB_MIN_V_BLANK_US) / v_active
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v_blank_lines = math.ceil(RB_MIN_V_BLANK_US / h_period_est_us)
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if v_blank_lines < 14:
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v_blank_lines = 14 # absolute floor for RB
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v_total = v_active + v_blank_lines
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v_sync = _v_sync_for_aspect(h_active, v_active)
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# CVT-RB v1: vertical front porch is fixed at RB_V_FRONT_PORCH (3),
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# vertical sync is aspect-dependent, vertical back porch absorbs the
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# remainder of v_blank.
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v_front = RB_V_FRONT_PORCH
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v_back = v_blank_lines - v_front - v_sync
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if v_back < RB_V_BACK_PORCH:
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# Bump v_blank so back porch meets the spec minimum.
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v_blank_lines += RB_V_BACK_PORCH - v_back
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v_back = RB_V_BACK_PORCH
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v_total = v_active + v_blank_lines
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h_total = h_active + RB_H_BLANK
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raw_pclk_hz = v_total * h_total * refresh
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# Quantize to CLOCK_STEP (250 kHz) per CVT spec.
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pclk_hz = (raw_pclk_hz // (CLOCK_STEP_KHZ * 1000)) * CLOCK_STEP_KHZ * 1000
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if pclk_hz == 0:
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# Refresh rate so low that quantization snapped to zero — fall back
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# to the raw value.
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pclk_hz = raw_pclk_hz
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actual_refresh = pclk_hz / (v_total * h_total)
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return {
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"h_active": h_active,
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"h_blank": RB_H_BLANK,
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"h_front": RB_H_FRONT_PORCH,
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"h_sync": RB_H_SYNC,
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"v_active": v_active,
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"v_blank": v_blank_lines,
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"v_front": v_front,
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"v_sync": v_sync,
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"h_total": h_total,
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"v_total": v_total,
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"pclk_hz": pclk_hz,
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"refresh": actual_refresh,
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# CVT-RB always has positive Hsync, negative Vsync
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"hsync_pos": True,
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"vsync_pos": False,
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}
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def make_dtd(t):
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"""Build an 18-byte detailed timing descriptor from cvt_rb() output."""
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pclk_10khz = t["pclk_hz"] // 10_000
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if pclk_10khz > 0xFFFF:
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raise ValueError("pixel clock too high for DTD")
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h_act = t["h_active"]
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h_bl = t["h_blank"]
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v_act = t["v_active"]
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v_bl = t["v_blank"]
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h_off = t["h_front"]
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h_pw = t["h_sync"]
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v_off = t["v_front"]
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v_pw = t["v_sync"]
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# Image size in mm; pick a 16:9-ish ~24" display
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h_mm = 530
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v_mm = 300
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h_border = 0
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v_border = 0
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# Flags byte:
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# bit 7-5: stereo (0)
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# bit 4-3: digital separate sync (11)
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# bit 2: vsync polarity (1=pos, 0=neg)
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# bit 1: hsync polarity (1=pos, 0=neg)
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# bit 0: 0
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flags = 0b00011000 # digital separate
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if t["hsync_pos"]:
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flags |= 0b00000010
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if t["vsync_pos"]:
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flags |= 0b00000100
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dtd = bytearray(18)
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dtd[0] = pclk_10khz & 0xFF
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dtd[1] = (pclk_10khz >> 8) & 0xFF
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dtd[2] = h_act & 0xFF
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dtd[3] = h_bl & 0xFF
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dtd[4] = ((h_act >> 8) & 0x0F) << 4 | ((h_bl >> 8) & 0x0F)
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dtd[5] = v_act & 0xFF
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dtd[6] = v_bl & 0xFF
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dtd[7] = ((v_act >> 8) & 0x0F) << 4 | ((v_bl >> 8) & 0x0F)
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dtd[8] = h_off & 0xFF
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dtd[9] = h_pw & 0xFF
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dtd[10] = ((v_off & 0x0F) << 4) | (v_pw & 0x0F)
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dtd[11] = (
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((h_off >> 8) & 0x03) << 6
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| ((h_pw >> 8) & 0x03) << 4
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| ((v_off >> 4) & 0x03) << 2
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| ((v_pw >> 4) & 0x03)
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)
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dtd[12] = h_mm & 0xFF
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dtd[13] = v_mm & 0xFF
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dtd[14] = ((h_mm >> 8) & 0x0F) << 4 | ((v_mm >> 8) & 0x0F)
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dtd[15] = h_border
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dtd[16] = v_border
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dtd[17] = flags
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return bytes(dtd)
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def make_range_descriptor(vmin, vmax, hmin_khz, hmax_khz, max_pclk_mhz):
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"""
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EDID 1.4 monitor range descriptor.
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Supports rates >=255 Hz via the offset byte (byte 4).
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"""
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# Byte 4 'offset' encoding (EDID 1.4):
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# bit 0: V min rate offset (0 or 255)
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# bit 1: V max rate offset (0 or 255)
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# bit 2: H min rate offset (0 or 255)
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# bit 3: H max rate offset (0 or 255)
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# If we need V or H over 255, set offset bit and store value-255.
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offset_byte = 0
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vmin_b, vmax_b = vmin, vmax
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hmin_b, hmax_b = hmin_khz, hmax_khz
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if vmax > 255:
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offset_byte |= 0b10
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vmax_b = vmax - 255
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if vmin > 255:
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offset_byte |= 0b01
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vmin_b = vmin - 255
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if hmax_khz > 255:
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offset_byte |= 0b1000
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hmax_b = hmax_khz - 255
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if hmin_khz > 255:
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offset_byte |= 0b0100
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hmin_b = hmin_khz - 255
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desc = bytearray(18)
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desc[0:4] = b"\x00\x00\x00\xfd"
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desc[4] = offset_byte
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desc[5] = vmin_b & 0xFF
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desc[6] = vmax_b & 0xFF
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desc[7] = hmin_b & 0xFF
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desc[8] = hmax_b & 0xFF
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desc[9] = max_pclk_mhz // 10
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desc[10] = 0x00 # default GTF
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desc[11:18] = b"\x0a\x20\x20\x20\x20\x20\x20"
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return bytes(desc)
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def make_name_descriptor(name):
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desc = bytearray(18)
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desc[0:4] = b"\x00\x00\x00\xfc"
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desc[4] = 0x00
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name_b = name.encode("ascii")[:13]
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desc[5 : 5 + len(name_b)] = name_b
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if len(name_b) < 13:
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desc[5 + len(name_b)] = 0x0A # LF terminator
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for i in range(5 + len(name_b) + 1, 18):
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desc[i] = 0x20
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return bytes(desc)
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def make_dummy_descriptor():
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desc = bytearray(18)
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desc[0:4] = b"\x00\x00\x00\x10"
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return bytes(desc)
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def make_base_block(modes, monitor_name="JetKVM HiHz", vmin=23, vmax=250, hmin=15, hmax=255, max_pclk_mhz=160):
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"""
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Build a 128-byte EDID 1.3/1.4 base block.
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modes: list of cvt_rb() outputs. The first one becomes the preferred DTD.
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Up to 2 DTDs in base block (slots 1 & 2). The other two slots get range
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descriptor and name descriptor.
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"""
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if len(modes) < 1:
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raise ValueError("need at least one mode")
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edid = bytearray(128)
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# Header
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edid[0:8] = b"\x00\xff\xff\xff\xff\xff\xff\x00"
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# Manufacturer ID "JET" -> 3 5-bit chars: J=10, E=5, T=20
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# JetKVM uses 0x28 0xB4 = 'JKV' originally in stock; we keep that.
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edid[8] = 0x28
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edid[9] = 0xB4
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# Product code
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edid[10] = 0x02
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edid[11] = 0x00
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# Serial number (32-bit LE)
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edid[12:16] = b"\x01\xee\xff\xc0"
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# Week / Year (year of manufacture: 2024 = 0x22 = 34)
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edid[16] = 0x30
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edid[17] = 0x23
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# EDID version 1.4 (so extended range descriptors are accepted by modern GPUs)
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edid[18] = 0x01
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edid[19] = 0x04
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# Video input definition: digital, 8 bpc, HDMI
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edid[20] = 0x80
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# Max horizontal/vertical image size in cm
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edid[21] = 0x35
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edid[22] = 0x1E
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# Display gamma (2.2)
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edid[23] = 0x78
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# Feature support: digital, YCbCr 4:2:2 + RGB 4:4:4, sRGB color space,
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# preferred timing in DTD0 (mandatory in EDID 1.4)
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edid[24] = 0x0E
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# Chromaticity / color characteristics (sRGB)
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edid[25:35] = b"\xee\x91\xa3\x54\x4c\x99\x26\x0f\x50\x54"
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# Established timings: bit 5 = 640x480@60 (recommended by EDID spec for
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# VGA-fallback compatibility). Source still prefers DTD0.
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edid[35] = 0x20
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edid[36] = 0x00
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edid[37] = 0x00
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# Standard timings (8 of them; all unused = 0x01 0x01)
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for i in range(38, 54):
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edid[i] = 0x01
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# 4 x 18-byte descriptors at bytes 54-125
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# We give: DTD0 = preferred mode, DTD1 = second mode (if any), then range, then name
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descs = []
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descs.append(make_dtd(modes[0]))
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if len(modes) >= 2:
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descs.append(make_dtd(modes[1]))
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else:
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descs.append(make_dummy_descriptor())
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descs.append(make_range_descriptor(vmin, vmax, hmin, hmax, max_pclk_mhz))
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descs.append(make_name_descriptor(monitor_name))
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edid[54:72] = descs[0]
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edid[72:90] = descs[1]
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edid[90:108] = descs[2]
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edid[108:126] = descs[3]
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edid[126] = 0 # extension count
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# Checksum
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s = sum(edid[:127]) & 0xFF
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edid[127] = (256 - s) & 0xFF
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return bytes(edid)
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def make_cea_extension(extra_modes=None):
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"""CEA-861 extension block with extra DTDs for high-refresh modes."""
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if extra_modes is None:
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extra_modes = []
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ext = bytearray(128)
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ext[0] = 0x02 # CEA extension tag
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ext[1] = 0x03 # revision 3
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# DTD offset = where DTDs start. 4 means no data block payload (other than 0 bytes).
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# We'll keep no data block payload to maximize DTD space. DTD offset = 4.
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dtd_offset = 4
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ext[2] = dtd_offset
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# Byte 3: support flags (no audio/YCbCr support advertised aggressively)
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ext[3] = 0x00
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# No data blocks payload — go straight to DTDs
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pos = dtd_offset
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# We have 127 - dtd_offset - 1(checksum) = 122 bytes; 6 DTDs max.
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max_dtds = (127 - dtd_offset) // 18
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for m in extra_modes[:max_dtds]:
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dtd = make_dtd(m)
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ext[pos : pos + 18] = dtd
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pos += 18
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# Pad with zeros up to byte 126
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# Checksum
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s = sum(ext[:127]) & 0xFF
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ext[127] = (256 - s) & 0xFF
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return bytes(ext)
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def edid_for_mode_set(name, modes, vmin=23, vmax=250, hmin=15, hmax=255, max_pclk_mhz=160):
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"""
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Build a complete EDID where modes[0] is preferred. If >2 modes, the rest go
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in a CEA-861 extension as additional DTDs.
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"""
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base = make_base_block(modes, monitor_name=name, vmin=vmin, vmax=vmax, hmin=hmin, hmax=hmax, max_pclk_mhz=max_pclk_mhz)
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if len(modes) > 2:
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ext = make_cea_extension(extra_modes=modes[2:])
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# Set extension count
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base = bytearray(base)
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base[126] = 1
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# Recompute base checksum
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s = sum(base[:127]) & 0xFF
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base[127] = (256 - s) & 0xFF
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base = bytes(base)
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return base + ext
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return base
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def show_mode(t):
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return (
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f"{t['h_active']}x{t['v_active']}@{t['refresh']:.2f}Hz "
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f"pclk={t['pclk_hz']/1e6:.2f}MHz "
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f"htot={t['h_total']} vtot={t['v_total']} "
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f"hsync_freq={t['pclk_hz']/t['h_total']/1000:.1f}kHz"
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)
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def cvt_standard(h_active, v_active, refresh):
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"""CVT v1 (non-reduced blanking). Wider blanking — sometimes more chip-tolerant."""
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h_active = (h_active // 8) * 8
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H_SYNC_PER_LINE = 0.08 # CVT spec: 8% of htotal for hsync
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MIN_VSYNC_BP_US = 550
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MIN_V_PORCH = 3
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V_SYNC = _v_sync_for_aspect(h_active, v_active)
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h_period_est = (1_000_000 / refresh - MIN_VSYNC_BP_US) / (v_active + MIN_V_PORCH)
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v_sync_bp_lines = math.ceil(MIN_VSYNC_BP_US / h_period_est)
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v_back = v_sync_bp_lines - V_SYNC
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if v_back < 6:
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v_back = 6
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v_total = v_active + MIN_V_PORCH + V_SYNC + v_back
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# Ideal duty cycle
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ideal_duty = 30 - 300 * (h_period_est / 1000.0)
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if ideal_duty < 20:
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ideal_duty = 20
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h_total = (h_active * 100 / (100 - ideal_duty))
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h_total = int(h_total / 8) * 8
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h_blank = h_total - h_active
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h_sync = int(h_total * 0.08 / 8) * 8
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h_back = h_blank // 2
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h_front = h_blank - h_back - h_sync
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pclk_khz_target = (v_total * h_total * refresh) / 1000
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pclk_khz = int(pclk_khz_target / 250) * 250
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return {
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"h_active": h_active, "h_blank": h_blank, "h_front": h_front, "h_sync": h_sync,
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"v_active": v_active, "v_blank": v_total - v_active,
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"v_front": MIN_V_PORCH, "v_sync": V_SYNC,
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"h_total": h_total, "v_total": v_total,
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"pclk_hz": pclk_khz * 1000,
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"refresh": pclk_khz * 1000 / (h_total * v_total),
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"hsync_pos": False, "vsync_pos": True, # standard CVT polarity
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}
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CANDIDATES = {
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"480p120": ("JetKVM 480p120", [cvt_rb(854, 480, 120)]),
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"480p144": ("JetKVM 480p144", [cvt_rb(854, 480, 144)]),
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"480p144s": ("JetKVM 480p144s", [cvt_standard(854, 480, 144)]),
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"480p165": ("JetKVM 480p165", [cvt_rb(854, 480, 165)]),
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"480p180": ("JetKVM 480p180", [cvt_rb(854, 480, 180)]),
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"480p200": ("JetKVM 480p200", [cvt_rb(854, 480, 200)]),
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"480p240": ("JetKVM 480p240", [cvt_rb(854, 480, 240)]),
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"480p240s": ("JetKVM 480p240s", [cvt_standard(854, 480, 240)]),
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"720p100": ("JetKVM 720p100", [cvt_rb(1280, 720, 100)]),
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"720p120": ("JetKVM 720p120", [cvt_rb(1280, 720, 120)]),
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"720p144": ("JetKVM 720p144", [cvt_rb(1280, 720, 144)]),
|
||||
# Probe: send a battery of 480p modes at different refresh in one EDID
|
||||
"probe480": ("JetKVM probe480", [
|
||||
cvt_rb(854, 480, 120),
|
||||
cvt_rb(854, 480, 144),
|
||||
cvt_rb(854, 480, 165),
|
||||
cvt_rb(854, 480, 180),
|
||||
cvt_rb(854, 480, 200),
|
||||
]),
|
||||
# Probe: refresh rates near the 120 Hz cliff
|
||||
"probe120": ("JetKVM probe120", [
|
||||
cvt_rb(854, 480, 120),
|
||||
cvt_rb(854, 480, 125),
|
||||
cvt_rb(854, 480, 130),
|
||||
cvt_rb(854, 480, 135),
|
||||
cvt_rb(854, 480, 140),
|
||||
]),
|
||||
# Probe: 720p at variable refresh
|
||||
"probe720": ("JetKVM probe720", [
|
||||
cvt_rb(1280, 720, 120),
|
||||
cvt_rb(1280, 720, 130),
|
||||
cvt_rb(1280, 720, 140),
|
||||
cvt_rb(1280, 720, 150),
|
||||
]),
|
||||
# Probe: alt resolutions at 120 Hz to characterize chip
|
||||
"probealt": ("JetKVM probealt", [
|
||||
cvt_rb(1024, 768, 120),
|
||||
cvt_rb(960, 540, 120),
|
||||
cvt_rb(960, 540, 144),
|
||||
cvt_rb(640, 480, 144),
|
||||
cvt_rb(800, 600, 144),
|
||||
]),
|
||||
# Combined: only modes the TC358743 chip actually locks onto
|
||||
# (chip has a hard ~120 Hz vrefresh ceiling)
|
||||
"combo": ("JetKVM 120Hz", [
|
||||
cvt_rb(854, 480, 120),
|
||||
cvt_rb(1280, 720, 120),
|
||||
]),
|
||||
}
|
||||
|
||||
|
||||
def main():
|
||||
if len(sys.argv) < 2:
|
||||
print("Usage: edid_gen.py <mode>")
|
||||
print(f"Modes: {', '.join(CANDIDATES.keys())}")
|
||||
sys.exit(1)
|
||||
key = sys.argv[1]
|
||||
if key not in CANDIDATES:
|
||||
print(f"unknown mode {key}")
|
||||
sys.exit(1)
|
||||
name, modes = CANDIDATES[key]
|
||||
for m in modes:
|
||||
print(f"# {show_mode(m)}", file=sys.stderr)
|
||||
edid = edid_for_mode_set(name, modes)
|
||||
print(edid.hex())
|
||||
|
||||
|
||||
if __name__ == "__main__":
|
||||
main()
|
||||
Reference in New Issue
Block a user